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Livid
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V2EX  ›  程序员

每个计算机工程师都应该知道的一组数字

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  •   Livid ·
    PRO
    · Apr 4, 2011 · 6723 views
    This topic created in 5524 days ago, the information mentioned may be changed or developed.
    According to http://www.cs.cornell.edu/projects/ladis2009/talks/dean-keynote-ladis2009.pdf

    • L1 cache reference: 0.5 ns
    • Branch mispredict: 5 ns
    • L2 cache reference: 7 ns
    • Mutex lock/unlock: 100 ns
    • Main memory reference: 100 ns
    • Compress 1K bytes with Zippy: 10,000 ns
    • Send 2K bytes over 1 Gbps network: 20,000 ns
    • Read 1 MB sequentially from memory: 250,000 ns
    • Round trip within same datacenter: 500,000 ns
    • Disk seek: 10,000,000 ns
    • Read 1 MB sequentially from network: 10,000,000 ns
    • Read 1 MB sequentially from disk: 30,000,000 ns
    • Send packet CA->Netherlands->CA: 150,000,000 ns
    7 replies    1970-01-01 08:00:00 +08:00
    willwen
        1
    willwen  
       Apr 4, 2011
    这可以用超频调。。取决于性能。。
    Oliver
        2
    Oliver  
       Apr 4, 2011
    L1 Cache 的速度好快啊。寄存器的速度是否会更快,或者和 L1 Cache 持平?
    stranbird
        3
    stranbird  
       Apr 4, 2011
    寄存是硬件实现 显然很快啊。 L1就是用寄存器们来实现的。
    dogFish
        4
    dogFish  
       Apr 4, 2011
    @stranbird L1,L2,寄存器都是CPU内建存储, 没有谁实现谁一说吧
    dogFish
        5
    dogFish  
       Apr 4, 2011
    @Oliver 至少持平吧, 我猜的:p
    对于程序员,寄存器速度没有直接意义吧, 能减少缓存命中次数是最接近cpu的优化了吧
    dogFish
        6
    dogFish  
       Apr 4, 2011
    错了, 是减少命中失败次数
    Oliver
        7
    Oliver  
       Apr 4, 2011
    @dogFish 谢谢!
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